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Introducing the ZBasic Microcontroller Platform |
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Wednesday, 30 November 2005 |
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Page 2 of 5 ZBasic Architecture
The first ZBasic platform was based on an Atmel ATmega32
microcontroller with a clock speed of 14.7456 MHz. The
onboard Flash memory of the ATmega32 processor is dedicated to the
ZBasic internal system firmware (the virtual machine or VM). The 2K
bytes of the ATmega32 RAM memory is partitioned into User RAM and
System RAM. The User RAM area is 1.5K bytes and is reserved for the
direct access by user-written programs and heap space for dynamically created memory such as strings. The 512 bytes of System RAM is
reserved for use by the ZBasic virtual machine. Also 992 out of 1024 bytes of internal processor EEPROM is available
for persistent variables. The user’s compiled program is stored in 32K
bytes of external EEPROM. The "second" generation of
ZBasic devices are based on the ATmega644 microcontroller which is pin
compatible with the ATmega32. The larger RAM and EEPROM of the
ATmega644 directly translates into more RAM (3.5 Kbytes) and EEPROM (2016
bytes) for the ZBasic programmer.
A recent addition to the family of ZBasic devices are the ZX-24e and ZX-24ae. These are 40 pin DIL devices that are pin compatible with the 24 pins of a ZX-24 but are extended to include an additional 16 pins for more I/O. The ZX-24e/ZX-24ae are also integrated like the ZX-24/ZX-24a devices but add a true RS232 level transceiver, a switch to select logic level or RS232 level outputs, socketed EEPROM, and a power moniter LED. See the Oak Micros website for additional information.

The ZBasic IDE, compiler, downloader and softcopy reference documentation can be downloaded from the ZBasic website. The website also contains application notes for ZBasic and forums for support and questions.
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